A new leak around AMD’s upcoming Zen 7 EPYC processors suggests a big shift in the x86 server space, with next-gen “Florence” CPUs reportedly scaling up to 288 cores per socket, following earlier Zen architecture developments. The details also point to a redesigned 3D stacked architecture and noticeable gains in AI and data center performance, as AMD pushes further into high-density compute for cloud, enterprise, and AI workloads.
AMD is working on its next EPYC platform under the codename “Florence,” with configurations scaling up to eight chiplets, each packing 36 cores, continuing its chiplet-based design strategy. That adds up to 288 cores per socket, a big jump over current EPYC designs and another sign that AMD is doubling down on scalability for hyperscale and enterprise workloads.
Instead of stacking cache on top of the compute dies like before, Zen 7 is expected to split cache and cores into separate dies, with the cache placed underneath. This approach could help improve thermals, reduce latency, and keep strong cache access per core, while still making room for higher core counts.
Early details suggest the Zen 7 core could land somewhere between traditional high-performance cores and more efficiency-focused designs. In real-world use, that could translate to better performance per watt while still maintaining strong single-thread performance, something that’s often been tricky for CPUs with very high core counts.
AMD is expected to use a mix of advanced process nodes, a trend also seen across modern CPU architectures. The compute dies will likely be built on TSMC’s A14-class node, while the cache and IO components could use N4P and N3-class technologies. This kind of multi-node setup helps balance performance, cost, and efficiency, and it’s becoming a standard approach in modern chip design.
Early estimates point to Zen 7 delivering around a 15 to 25 percent IPC uplift compared to Zen 6. At the same time, AMD seems to be putting a stronger focus on AI workloads, with expected improvements in low-precision formats like INT8 and FP8, reflecting broader AI acceleration trends. That matters as AI inference and large-scale data processing continue to grow across modern data centers.
Zen 7 may eventually move to PCIe Gen 7, though that transition is likely to occur later in its lifecycle. Memory support is expected to remain on DDR5, which suggests AMD is aiming to maintain platform stability rather than introduce too many changes at once.
The leak also hints that these chips could stay compatible with existing IO dies. If that turns out to be true, it could help cut upgrade costs for enterprise users and make it easier to roll out newer CPUs within the current infrastructure.
Zen 7 isn’t just about servers it could also bring solid gains to mobile processors, similar to improvements seen in recent AMD laptop chips. Early estimates point to efficiency improvements of around 30 to 36 percent in certain workloads, especially at lower power levels. That’s a big deal for laptops, where performance per watt really matters.
There are also early hints that the architecture could make its way to desktop platforms. In that case, configurations with up to 72 cores might be possible, though chips like that would likely be limited to workstation or niche use cases because of thermal and cost constraints.
Zen 7 is expected to arrive sometime around late 2028, following Zen 6. If these leaks hold up, it points to a bigger shift in CPU design, with AMD moving toward a more modular and flexible approach that combines higher core counts with new packaging methods and a stronger focus on AI performance.
The real-world impact will depend on factors like software optimization, power efficiency, and overall platform cost. While a 288-core CPU is impressive on paper, how effectively that performance can be used in real workloads will ultimately determine how much it matters in practice.
Source: Moore’s Law Is Dead (YouTube)
