AMD has kicked off early supply chain negotiations in Taiwan for its next-generation Zen 7 processor platform, codenamed “Grimlock.” Company Chairman and CEO Lisa Su personally traveled to Taiwan to lock down production capacity for the processors, which are scheduled to release in 2028. The early preparation ensures that AMD can secure cutting-edge manufacturing lines well before mass production begins.
The upcoming Zen 7 core chiplet dies (CCDs) will be manufactured using TSMC’s advanced A14 process technology. AMD will integrate its next-generation 3D V-Cache on top of these dies, allowing a flagship 16-core CCD to hold up to 224MB of L3 cache. To fit the larger physical footprint of this cache layout, AMD is evaluating Powertech Technology’s Fan-Out Panel-Level Packaging (FOPLP) solution, with Su personally inspecting Powertech’s production lines.
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Packing 224MB of L3 cache into a single CCD requires high-speed data transmission interfaces to avoid data bottlenecks. AMD has contracted Parade Technologies to develop custom ASIC-like chips for high-speed transmission. These 6nm and 12nm chips have already entered trial production, laying the groundwork to coordinate intense data migration between the CPU cores and memory pools.
AMD has consistently used large cache capacities to differentiate its processors, a strategy demonstrated in current high-performance chips like the Ryzen 9 9950X3D2. With the Zen 7 generation, this cache hierarchy will be extended to handle intensive database workloads, AI inference, and Agentic AI applications.
The early 2028 timeline puts AMD’s next-generation platform in direct competition with future semiconductor architectures, including Intel Panther Lake designs. While competitors prepare their upcoming nodes, AMD’s shift to TSMC’s A14 trial production in 2027 represents a long-term play to dominate advanced packaging and high-bandwidth workloads.
In modern data centers and edge environments, the rise of AI agents is shifting the CPU’s primary role. Rather than simply serving as a supporting coordinator for the GPU, the central processor is now responsible for task breakdown, memory scheduling, and I/O coordination.
When managing complex workloads like multi-agent collaboration, vector databases, and RAG retrieval, cache capacity and data transfer efficiency become primary bottlenecks. The Zen 7 platform’s high-density cache and low-latency packaging are specifically designed to address these system-level constraints.
TSMC is expected to start trial production of the A14 node at its Dachung Fab 25 P1 plant in 2027, clearing the path for AMD’s full retail rollout in 2028.
Source: Commercial Times
